MediaWiki API result
This is the HTML representation of the JSON format. HTML is good for debugging, but is unsuitable for application use.
Specify the format parameter to change the output format. To see the non-HTML representation of the JSON format, set format=json.
See the complete documentation, or the API help for more information.
{
"batchcomplete": "",
"continue": {
"lecontinue": "20250318195937|13",
"continue": "-||"
},
"query": {
"logevents": [
{
"logid": 23,
"ns": 0,
"title": "Introduction to digital logic",
"pageid": 16,
"logpage": 16,
"params": {},
"type": "create",
"action": "create",
"user": "Immibis",
"timestamp": "2025-06-15T11:26:11Z",
"comment": "first draft"
},
{
"logid": 22,
"ns": 6,
"title": "File:Transport-triggered architecture example.png",
"pageid": 14,
"logpage": 14,
"params": {
"img_sha1": "8ioqryih1drmkz9ymh03gqhnb4oy4rp",
"img_timestamp": "2025-05-03T21:54:34Z"
},
"type": "upload",
"action": "overwrite",
"user": "Demindiro",
"timestamp": "2025-05-03T21:54:34Z",
"comment": "Remove register with overlapping ports"
},
{
"logid": 21,
"ns": 6,
"title": "File:Transport-triggered architecture example.png",
"pageid": 14,
"logpage": 14,
"params": {
"img_sha1": "2wwlo7qs9gvlzxbor0cnjujr5p97efi",
"img_timestamp": "2025-05-03T21:52:39Z"
},
"type": "upload",
"action": "overwrite",
"user": "Demindiro",
"timestamp": "2025-05-03T21:52:39Z",
"comment": "Fix bit count for A, double resolution"
},
{
"logid": 20,
"ns": 0,
"title": "Transport triggered architecture",
"pageid": 15,
"logpage": 15,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-05-03T21:49:42Z",
"comment": "Created page with \"A '''Transport triggered architecture''' ('''TTA''') is a [[one instruction set computer]] which only moves data between various function units. It is a very minimal, simple a...\""
},
{
"logid": 19,
"ns": 6,
"title": "File:Transport-triggered architecture example.png",
"pageid": 14,
"logpage": 14,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-05-03T21:47:40Z",
"comment": ""
},
{
"logid": 18,
"ns": 6,
"title": "File:Transport-triggered architecture example.png",
"pageid": 14,
"logpage": 14,
"params": {
"img_sha1": "0h5lx6r77xja5fxs3g74c7a832ueldt",
"img_timestamp": "2025-05-03T21:47:40Z"
},
"type": "upload",
"action": "upload",
"user": "Demindiro",
"timestamp": "2025-05-03T21:47:40Z",
"comment": ""
},
{
"logid": 17,
"ns": 2,
"title": "User:Demindiro/Ramblings/Massively concurrent Stack-Stack-Machine",
"pageid": 13,
"logpage": 13,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-04-05T12:45:35Z",
"comment": "Dump of a potentially silly idea"
},
{
"logid": 16,
"ns": 0,
"title": "Hardware Description Language",
"pageid": 12,
"logpage": 12,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-03-21T20:35:46Z",
"comment": "Created page with \"A <strong>hardware description language</strong>, or <strong>HDL</strong>, is a tool to describe the behavior of electronic circuits. While intended for simulation, most (all...\""
},
{
"logid": 15,
"ns": 0,
"title": "Pipelining",
"pageid": 11,
"logpage": 11,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-03-18T20:30:09Z",
"comment": "Draft"
},
{
"logid": 14,
"ns": 0,
"title": "RISC vs CISC",
"pageid": 10,
"logpage": 10,
"params": {},
"type": "create",
"action": "create",
"user": "Demindiro",
"timestamp": "2025-03-18T20:12:26Z",
"comment": "Draft"
}
]
}
}